llprocessor.cpp

/** 
 * @file llprocessor.cpp
 * @brief Code to figure out the processor. Originally by Benjamin Jurke.
 *
 * $LicenseInfo:firstyear=2002&license=viewergpl$
 * 
 * Copyright (c) 2002-2009, Linden Research, Inc.
 * 
 * Second Life Viewer Source Code
 * The source code in this file ("Source Code") is provided by Linden Lab
 * to you under the terms of the GNU General Public License, version 2.0
 * ("GPL"), unless you have obtained a separate licensing agreement
 * ("Other License"), formally executed by you and Linden Lab.  Terms of
 * the GPL can be found in doc/GPL-license.txt in this distribution, or
 * online at http://secondlifegrid.net/programs/open_source/licensing/gplv2
 * 
 * There are special exceptions to the terms and conditions of the GPL as
 * it is applied to this Source Code. View the full text of the exception
 * in the file doc/FLOSS-exception.txt in this software distribution, or
 * online at
 * http://secondlifegrid.net/programs/open_source/licensing/flossexception
 * 
 * By copying, modifying or distributing this software, you acknowledge
 * that you have read and understood your obligations described above,
 * and agree to abide by those obligations.
 * 
 * ALL LINDEN LAB SOURCE CODE IS PROVIDED "AS IS." LINDEN LAB MAKES NO
 * WARRANTIES, EXPRESS, IMPLIED OR OTHERWISE, REGARDING ITS ACCURACY,
 * COMPLETENESS OR PERFORMANCE.
 * $/LicenseInfo$
 */

#include "linden_common.h"
#include "llprocessor.h"

//#include <memory>

#if LL_WINDOWS
#	define WIN32_LEAN_AND_MEAN
#	include <winsock2.h>
#	include <windows.h>
#   include <intrin.h>
#endif

#include <boost/scoped_ptr.hpp>
#include "llsd.h"

#if LL_MSVC && _M_X64
#      define LL_X86_64 1
#      define LL_X86 1
#elif LL_MSVC && _M_IX86
#      define LL_X86 1
#elif LL_GNUC && ( defined(__amd64__) || defined(__x86_64__) )
#      define LL_X86_64 1
#      define LL_X86 1
#elif LL_GNUC && ( defined(__i386__) )
#      define LL_X86 1
#elif LL_GNUC && ( defined(__powerpc__) || defined(__ppc__) )
#      define LL_PPC 1
#endif

class LLProcessorInfoImpl; // foward declaration for the gImpl;

namespace 
{
	static const char* cpu_feature_names[] =
	{
		"x87 FPU On Chip",
		"Virtual-8086 Mode Enhancement",
		"Debugging Extensions",
		"Page Size Extensions",
		"Time Stamp Counter",
		"RDMSR and WRMSR Support",
		"Physical Address Extensions",
		"Machine Check Exception",
		"CMPXCHG8B Instruction",
		"APIC On Chip",
		"Unknown1",
		"SYSENTER and SYSEXIT",
		"Memory Type Range Registers",
		"PTE Global Bit",
		"Machine Check Architecture",
		"Conditional Move/Compare Instruction",
		"Page Attribute Table",
		"Page Size Extension",
		"Processor Serial Number",
		"CFLUSH Extension",
		"Unknown2",
		"Debug Store",
		"Thermal Monitor and Clock Ctrl",
		"MMX Technology",
		"FXSAVE/FXRSTOR",
		"SSE Extensions",
		"SSE2 Extensions",
		"Self Snoop",
		"Hyper-threading Technology",
		"Thermal Monitor",
		"Unknown4",
		"Pend. Brk. EN.", // End of FeatureInfo bits

		"SSE3 New Instructions", // 32
		"MONITOR/MWAIT", 
		"CPL Qualified Debug Store",
		"Thermal Monitor 2"
	};

	enum cpu_features 
	{
		eSSE_Ext=25,
		eSSE2_Ext=26,
		eSSE3_Features=32,
		eMONTIOR_MWAIT=33,
		eCPLDebugStore=34,
		eThermalMonitor2=35
	};

	// Pointer to the active impl.
	boost::scoped_ptr<LLProcessorInfoImpl> gImpl;
}

// The base class for implementations.
// Each platform should override this class.
class LLProcessorInfoImpl
{
public:
	LLProcessorInfoImpl() {}
	virtual ~LLProcessorInfoImpl() {}

	F64 getCPUFrequency() const 
	{ 
		return getInfo("Frequency", 0).asReal(); 
	}

	bool hasSSE() const 
	{ 
		return hasExtension(cpu_feature_names[eSSE_Ext]);
	}

	bool hasSSE2() const
	{ 
		return hasExtension(cpu_feature_names[eSSE2_Ext]);
	}

	bool hasAltivec() const 
	{
		return hasExtension("Altivec"); 
	}

	std::string getCPUFamilyName() const { return getInfo("FamilyName", "Unknown").asString(); }
	std::string getCPUBrandName() const { return getInfo("BrandName", "Unknown").asString(); }
	std::string getCPUFeatureDescription() const 
	{
		std::ostringstream out;
		out << std::endl << std::endl;
		out << "// CPU General Information" << std::endl;
		out << "//////////////////////////" << std::endl;
		out << "Processor Name:   " << getCPUBrandName() << std::endl;
		out << "Frequency:        " << getCPUFrequency() / (F64)1000000 << " MHz" << std::endl;
		out << "Vendor:			  " << getInfo("Vendor", "Unknown").asString() << std::endl;
		out << "Family:           " << getCPUFamilyName() << " (" << getInfo("Family", 0) << ")" << std::endl;
		out << "Extended family:  " << getInfo("ExtendedFamily", 0) << std::endl;
		out << "Model:            " << getInfo("Model", 0) << std::endl;
		out << "Extended model:   " << getInfo("ExtendedModel", 0) << std::endl;
		out << "Type:             " << getInfo("Type", 0) << std::endl;
		out << "Brand ID:         " << getInfo("BrandID", 0) << std::endl;
		out << std::endl;
		out << "// CPU Configuration" << std::endl;
		out << "//////////////////////////" << std::endl;
		out << "Max Supported CPUID level = " << getConfig("MaxID", 0) << std::endl;
		out << "Max Supported Ext. CPUID level = " << std::hex << getConfig("MaxExtID", 0) << std::dec << std::endl;
		out << "CLFLUSH cache line size = " <<  getConfig("CLFLUSHCacheLineSize", 0) << std::endl;
		out << "APIC Physical ID = " << getConfig("APICPhysicalID", 0) << std::endl;
		out << "Cache Line Size = " << getConfig("CacheLineSize", 0) << std::endl;
		out << "L2 Associativity = " << getConfig("L2Associativity", 0) << std::endl;
		out << "Cache Size = "  <<  getConfig("CacheSizeK", 0) << "K" << std::endl;
		out << std::endl;
		out << "// CPU Extensions" << std::endl;
		out << "//////////////////////////" << std::endl;
		
		for(LLSD::map_const_iterator itr = mProcessorInfo.beginMap(); itr != mProcessorInfo.endMap(); ++itr)
		{
			out << "  " << itr->first << std::endl;			
		}
		return out.str(); 
	}

protected:
	void setInfo(const std::string& name, const LLSD& value) { mProcessorInfo["info"][name]=value; }
	void setConfig(const std::string& name, const LLSD& value) { mProcessorInfo["config"][name]=value; }
	void setExtension(const std::string& name) { mProcessorInfo["extension"][name] = "true"; }

	LLSD getInfo(const std::string& name, const LLSD& defaultVal) const
	{ 
		LLSD r = mProcessorInfo["info"].get(name); 
		return r.isDefined() ? r : defaultVal;
	}

	LLSD getConfig(const std::string& name, const LLSD& defaultVal) const
	{ 
		LLSD r = mProcessorInfo["config"].get(name); 
		return r.isDefined() ? r : defaultVal;
	}

	bool hasExtension(const std::string& name) const
	{ 
		return mProcessorInfo["extension"].has(name);
	}

private:
	LLSD mProcessorInfo;
};


#ifdef LL_MSVC
// LL_MSVC and not LLWINDOWS because some of the following code 
// uses the MSVC compiler intrinsics __cpuid() and __rdtsc().

// Delays for the specified amount of milliseconds
static void _Delay(unsigned int ms)
{
	LARGE_INTEGER freq, c1, c2;
	__int64 x;

	// Get High-Res Timer frequency
	if (!QueryPerformanceFrequency(&freq))	
		return;

	// Convert ms to High-Res Timer value
	x = freq.QuadPart/1000*ms;		

	// Get first snapshot of High-Res Timer value
	QueryPerformanceCounter(&c1);		
	do
	{
		// Get second snapshot
		QueryPerformanceCounter(&c2);	
	}while(c2.QuadPart-c1.QuadPart < x);
	// Loop while (second-first < x)	
}

static F64 calculate_cpu_frequency(U32 measure_msecs)
{
	if(measure_msecs == 0)
	{
		return 0;
	}

	// After that we declare some vars and check the frequency of the high
	// resolution timer for the measure process.
	// If there's no high-res timer, we exit.
	unsigned __int64 starttime, endtime, timedif, freq, start, end, dif;
	if (!QueryPerformanceFrequency((LARGE_INTEGER *) &freq))
	{
		return 0;
	}

	// Now we can init the measure process. We set the process and thread priority
	// to the highest available level (Realtime priority). Also we focus the
	// first processor in the multiprocessor system.
	HANDLE hProcess = GetCurrentProcess();
	HANDLE hThread = GetCurrentThread();
	unsigned long dwCurPriorityClass = GetPriorityClass(hProcess);
	int iCurThreadPriority = GetThreadPriority(hThread);
	unsigned long dwProcessMask, dwSystemMask, dwNewMask = 1;
	GetProcessAffinityMask(hProcess, &dwProcessMask, &dwSystemMask);

	SetPriorityClass(hProcess, REALTIME_PRIORITY_CLASS);
	SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL);
	SetProcessAffinityMask(hProcess, dwNewMask);

	//// Now we call a CPUID to ensure, that all other prior called functions are
	//// completed now (serialization)
	//__asm cpuid
	int cpu_info[4] = {-1};
	__cpuid(cpu_info, 0);

	// We ask the high-res timer for the start time
	QueryPerformanceCounter((LARGE_INTEGER *) &starttime);

	// Then we get the current cpu clock and store it
	start = __rdtsc();

	// Now we wart for some msecs
	_Delay(measure_msecs);
	//	Sleep(uiMeasureMSecs);

	// We ask for the end time
	QueryPerformanceCounter((LARGE_INTEGER *) &endtime);

	// And also for the end cpu clock
	end = __rdtsc();

	// Now we can restore the default process and thread priorities
	SetProcessAffinityMask(hProcess, dwProcessMask);
	SetThreadPriority(hThread, iCurThreadPriority);
	SetPriorityClass(hProcess, dwCurPriorityClass);

	// Then we calculate the time and clock differences
	dif = end - start;
	timedif = endtime - starttime;

	// And finally the frequency is the clock difference divided by the time
	// difference. 
	F64 frequency = (F64)dif / (((F64)timedif) / freq);

	// At last we just return the frequency that is also stored in the call
	// member var uqwFrequency
	return frequency;
}

// Windows implementation
class LLProcessorInfoWindowsImpl : public LLProcessorInfoImpl
{
public:
	LLProcessorInfoWindowsImpl() :
	{
		getCPUIDInfo();
		AddInfoItem("Frequency", calculate_cpu_frequency(50));
	}

private:
	void getCPUIDInfo()
	{
		// http://msdn.microsoft.com/en-us/library/hskdteyh(VS.80).aspx

		// __cpuid with an InfoType argument of 0 returns the number of
		// valid Ids in cpu_info[0] and the CPU identification string in
		// the other three array elements. The CPU identification string is
		// not in linear order. The code below arranges the information 
		// in a human readable form.
		int cpu_info[4] = {-1};
		__cpuid(cpu_info, 0);
		unsigned int ids = (unsigned int)cpu_info[0];
		setInfo("MaxIDs", ids);

		char cpu_vendor[0x20];
		memset(cpu_vendor, 0, sizeof(cpu_vendor));
		*((int*)cpu_vendor) = cpu_info[1];
		*((int*)(cpu_vendor+4)) = cpu_info[3];
		*((int*)(cpu_vendor+8)) = cpu_info[2];

		// Get the information associated with each valid Id
		for(unsigned int i=0; i<=mIds; ++i)
		{
			__cpuid(cpu_info, i);

			// Interpret CPU feature information.
			if  (i == 1)
			{
				mSteppingID = cpu_info[0] & 0xf;
				mModel = (cpu_info[0] >> 4) & 0xf;
				mFamily = (cpu_info[0] >> 8) & 0xf;
				mProcessorType = (cpu_info[0] >> 12) & 0x3;
				mExtendedModel = (cpu_info[0] >> 16) & 0xf;
				mExtendedFamily = (cpu_info[0] >> 20) & 0xff;
				mBrandIndex = cpu_info[1] & 0xff;
				mCLFLUSHCacheLineSize = ((cpu_info[1] >> 8) & 0xff) * 8;
				mAPICPhysicalID = (cpu_info[1] >> 24) & 0xff;
				mSSE3NewInstructions = (cpu_info[2] & 0x1) || false;
				mMONITOR_MWAIT = (cpu_info[2] & 0x8) || false;
				mCPLQualifiedDebugStore = (cpu_info[2] & 0x10) || false;
				mThermalMonitor2 = (cpu_info[2] & 0x100) || false;
				mFeatureInfo = cpu_info[3];
			}
		}

		// Calling __cpuid with 0x80000000 as the InfoType argument
		// gets the number of valid extended IDs.
		__cpuid(cpu_info, 0x80000000);
		mExtIds = cpu_info[0];
		memset(mCPUBrandString, 0, sizeof(mCPUBrandString));

		// Get the information associated with each extended ID.
		for(unsigned int i=0x80000000; i<=mExtIds; ++i)
		{
			__cpuid(cpu_info, i);

			// Interpret CPU brand string and cache information.
			if  (i == 0x80000002)
				memcpy(mCPUBrandString, cpu_info, sizeof(cpu_info));
			else if  (i == 0x80000003)
				memcpy(mCPUBrandString + 16, cpu_info, sizeof(cpu_info));
			else if  (i == 0x80000004)
				memcpy(mCPUBrandString + 32, cpu_info, sizeof(cpu_info));
			else if  (i == 0x80000006)
			{
				mCacheLineSize = cpu_info[2] & 0xff;
				mL2Associativity = (cpu_info[2] >> 12) & 0xf;
				mCacheSizeK = (cpu_info[2] >> 16) & 0xffff;
			}
		}
	}

	std::string computeCPUFamilyName() const 
	{
		const char* intel_string = "GenuineIntel";
		const char* amd_string = "AuthenticAMD";
		if(!strncmp(mCPUString, intel_string, strlen(intel_string)))
		{
			U32 composed_family = mFamily + mExtendedFamily;
			switch(composed_family)
			{
			case 3: return "Intel i386";
			case 4: return "Intel i486";
			case 5: return "Intel Pentium";
			case 6: return "Intel Pentium Pro/2/3, Core";
			case 7: return "Intel Itanium (IA-64)";
			case 0xF: return "Intel Pentium 4";
			case 0x10: return "Intel Itanium 2 (IA-64)";
			default: return "Unknown";
			}
		}
		else if(!strncmp(mCPUString, amd_string, strlen(amd_string)))
		{
			U32 composed_family = (mFamily == 0xF) 
				? mFamily + mExtendedFamily
				: mFamily;
			switch(composed_family)
			{
			case 4: return "AMD 80486/5x86";
			case 5: return "AMD K5/K6";
			case 6: return "AMD K7";
			case 0xF: return "AMD K8";
			case 0x10: return "AMD K8L";
			default: return "Unknown";
			}
		}
		return "Unknown";
	}

};

#elif LL_DARWIN

class LLProcessorInfoDarwinImpl
{
public:
	LLProcessorInfoDarwinImpl() 
	{
		
	}

	virtual ~LLProcessorInfoDarwinImpl() {}

	virtual F64 getCPUFrequency() const { return 0; }
	virtual bool hasSSE() const { return false; }
	virtual bool hasSSE2() const { return false; }
	virtual bool hasAltivec() const { return false; }
	virtual std::string getCPUFamilyName() const { return "Unknown"; }
	virtual std::string getCPUBrandName() const { return "Unknown"; }
	virtual std::string getCPUFeatureDescription() const { return "Unknown"; }
};

#endif // LL_MSVC



// Interface implementation
LLProcessorInfo::LLProcessorInfo()
{
	// *NOTE:Mani - not thread safe.
	if(gImpl == NULL)
	{
#ifdef LL_MSVC
		gImpl.reset(new LLProcessorInfoWindowsImpl);
#elif LL_DARWIN
		gImpl.reset(new LLProcessorInfoDarwinImpl);
#else
	#error "Unimplemented"
#endif // LL_MSVC
	}
}

LLProcessorInfo::~LLProcessorInfo() {}
F64 LLProcessorInfo::getCPUFrequency() const { return gImpl->getCPUFrequency(); }
bool LLProcessorInfo::hasSSE() const { return gImpl->hasSSE(); }
bool LLProcessorInfo::hasSSE2() const { return gImpl->hasSSE2(); }
bool LLProcessorInfo::hasAltivec() const { return gImpl->hasAltivec(); }
std::string LLProcessorInfo::getCPUFamilyName() const { return gImpl->getCPUFamilyName(); }
std::string LLProcessorInfo::getCPUBrandName() const { return gImpl->getCPUBrandName(); }
std::string LLProcessorInfo::getCPUFeatureDescription() const { return gImpl->getCPUFeatureDescription(); }

#if 0
// Filename: Processor.cpp
// =======================
// Author: Benjamin Jurke
// File history: 27.02.2002  - File created. Support for Intel and AMD processors
//               05.03.2002  - Fixed the CPUID bug: On Pre-Pentium CPUs the CPUID
//                             command is not available
//                           - The CProcessor::WriteInfoTextFile function do not 
//                             longer use Win32 file functions (-> os independend)
//                           - Optional include of the windows.h header which is
//                             still need for CProcessor::GetCPUFrequency.
//               06.03.2002  - My birthday (18th :-))
//                           - Replaced the '\r\n' line endings in function 
//                             CProcessor::cpu_infoToText by '\n'
//                           - Replaced unsigned __int64 by signed __int64 for
//                             solving some compiler conversion problems
//                           - Fixed a bug at family=6, model=6 (Celeron -> P2)
//////////////////////////////////////////////////////////////////////////////////

#include "linden_common.h"

#include "processor.h"

#include <memory>

#if LL_WINDOWS
#	define WIN32_LEAN_AND_MEAN
#	include <winsock2.h>
#	include <windows.h>
#endif

#if !LL_DARWIN && !LL_SOLARIS

#ifdef PROCESSOR_FREQUENCY_MEASURE_AVAILABLE
// We need the QueryPerformanceCounter and Sleep functions
#define FORCEINLINE __forceinline
#else
#define FORCEINLINE 
#endif


// Some macros we often need
////////////////////////////
#define CheckBit(var, bit)   ((var & (1 << bit)) ? true : false)

#ifdef PROCESSOR_FREQUENCY_MEASURE_AVAILABLE
// Delays for the specified amount of milliseconds
static	void	_Delay(unsigned int ms)
{
   LARGE_INTEGER	freq, c1, c2;
	__int64		x;

   // Get High-Res Timer frequency
	if (!QueryPerformanceFrequency(&freq))	
		return;
		
	// Convert ms to High-Res Timer value
	x = freq.QuadPart/1000*ms;		

   // Get first snapshot of High-Res Timer value
	QueryPerformanceCounter(&c1);		
	do
	{
            // Get second snapshot
	    QueryPerformanceCounter(&c2);	
	}while(c2.QuadPart-c1.QuadPart < x);
	// Loop while (second-first < x)	
}
#endif

// CProcessor::CProcessor
// ======================
// Class constructor:
/////////////////////////
CProcessor::CProcessor()
{
	uqwFrequency = 0;
	strCPUName[0] = 0;
	memset(&cpu_info, 0, sizeof(cpu_info));
}

// unsigned __int64 CProcessor::GetCPUFrequency(unsigned int uiMeasureMSecs)
// =========================================================================
// Function to measure the current CPU frequency
////////////////////////////////////////////////////////////////////////////
F64 CProcessor::GetCPUFrequency(unsigned int uiMeasureMSecs)
{
#ifndef PROCESSOR_FREQUENCY_MEASURE_AVAILABLE
	return 0;
#else
	// If there are invalid measure time parameters, zero msecs for example,
	// we've to exit the function
	if (uiMeasureMSecs < 1)
	{
		// If theres already a measured frequency available, we return it
        if (uqwFrequency > 0)
			return uqwFrequency;
		else
			return 0;
	}

	// Now we check if the CPUID command is available
	if (!CheckCPUIDPresence())
		return 0;

	// First we get the CPUID standard level 0x00000001
	unsigned long reg;
	__asm
	{
		mov eax, 1
        cpuid
		mov reg, edx
	}

	// Then we check, if the RDTSC (Real Date Time Stamp Counter) is available.
	// This function is necessary for our measure process.
	if (!(reg & (1 << 4)))
		return 0;

	// After that we declare some vars and check the frequency of the high
	// resolution timer for the measure process.
	// If there's no high-res timer, we exit.
	__int64 starttime, endtime, timedif, freq, start, end, dif;
	if (!QueryPerformanceFrequency((LARGE_INTEGER *) &freq))
		return 0;

	// Now we can init the measure process. We set the process and thread priority
	// to the highest available level (Realtime priority). Also we focus the
	// first processor in the multiprocessor system.
	HANDLE hProcess = GetCurrentProcess();
	HANDLE hThread = GetCurrentThread();
	unsigned long dwCurPriorityClass = GetPriorityClass(hProcess);
	int iCurThreadPriority = GetThreadPriority(hThread);
	unsigned long dwProcessMask, dwSystemMask, dwNewMask = 1;
	GetProcessAffinityMask(hProcess, &dwProcessMask, &dwSystemMask);

	SetPriorityClass(hProcess, REALTIME_PRIORITY_CLASS);
	SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL);
	SetProcessAffinityMask(hProcess, dwNewMask);

	// Now we call a CPUID to ensure, that all other prior called functions are
	// completed now (serialization)
	__asm cpuid

	// We ask the high-res timer for the start time
	QueryPerformanceCounter((LARGE_INTEGER *) &starttime);

	// Then we get the current cpu clock and store it
	__asm 
	{
		rdtsc
		mov dword ptr [start+4], edx
		mov dword ptr [start], eax
	}

	// Now we wart for some msecs
	_Delay(uiMeasureMSecs);
//	Sleep(uiMeasureMSecs);

	// We ask for the end time
	QueryPerformanceCounter((LARGE_INTEGER *) &endtime);

	// And also for the end cpu clock
	__asm 
	{
		rdtsc
		mov dword ptr [end+4], edx
		mov dword ptr [end], eax
	}

	// Now we can restore the default process and thread priorities
	SetProcessAffinityMask(hProcess, dwProcessMask);
	SetThreadPriority(hThread, iCurThreadPriority);
	SetPriorityClass(hProcess, dwCurPriorityClass);

	// Then we calculate the time and clock differences
	dif = end - start;
	timedif = endtime - starttime;

	// And finally the frequency is the clock difference divided by the time
	// difference. 
	uqwFrequency = (F64)dif / (((F64)timedif) / freq);

	// At last we just return the frequency that is also stored in the call
	// member var uqwFrequency
	return uqwFrequency;
#endif
}

// bool CProcessor::AnalyzeIntelProcessor()
// ========================================
// Private class function for analyzing an Intel processor
//////////////////////////////////////////////////////////
bool CProcessor::AnalyzeIntelProcessor()
{
	// *NOTE:Mani -	http://www.intel.com/Assets/PDF/appnote/241618.pdf
	// According to the above doc, a lot of this what follows is wrong.
#if LL_WINDOWS
	unsigned long eaxreg, ebxreg, edxreg;

	// First we check if the CPUID command is available
	if (!CheckCPUIDPresence())
		return false;

	// Now we get the CPUID standard level 0x00000001
	__asm
	{
		mov eax, 1
		cpuid
		mov eaxreg, eax
		mov ebxreg, ebx
		mov edxreg, edx
	}
    
	// Then get the cpu model, family, type, stepping and brand id by masking
	// the eax and ebx register
	cpu_info.uiStepping = eaxreg & 0xF;
	cpu_info.uiModel    = (eaxreg >> 4) & 0xF;
	cpu_info.uiFamily   = (eaxreg >> 8) & 0xF;
	cpu_info.uiType     = (eaxreg >> 12) & 0x3;
	cpu_info.uiBrandID  = ebxreg & 0xF;

	// *NOTE:Mani - see http://www.intel.com/assets/pdf/appnote/241618.pdf
	// These values are composed according to section 2.1.2.2 of the above doc.
	cpu_info.uiExtendedFamily = ((eaxreg >> 20) & 0xFF) + cpu_info.uiFamily;
	cpu_info.uiExtendedModel = (((eaxreg >> 16) & 0xFF) << 4) + cpu_info.uiModel;

	// Getting the Brand ID string if supported.
	if (cpu_info.MaxSupportedExtendedLevel >= 0x80000004)
	{
		// If it supports the extended CPUID level 0x80000004 we read the data
		char tmp[52];		/* Flawfinder: ignore */
		memset(tmp, 0, sizeof(tmp));
        __asm
		{
			mov eax, 0x80000002
			cpuid
			mov dword ptr [tmp], eax
			mov dword ptr [tmp+4], ebx
			mov dword ptr [tmp+8], ecx
			mov dword ptr [tmp+12], edx
			mov eax, 0x80000003
			cpuid
			mov dword ptr [tmp+16], eax
			mov dword ptr [tmp+20], ebx
			mov dword ptr [tmp+24], ecx
			mov dword ptr [tmp+28], edx
			mov eax, 0x80000004
			cpuid
			mov dword ptr [tmp+32], eax
			mov dword ptr [tmp+36], ebx
			mov dword ptr [tmp+40], ecx
			mov dword ptr [tmp+44], edx
		}
		// And copy it to the brand id string
		strncpy(cpu_info.strBrandID, tmp,sizeof(cpu_info.strBrandID)-1);
		cpu_info.strBrandID[sizeof(cpu_info.strBrandID)-1]='\0';
	}
	else
	{
		static const char* INTEL_BRAND[] =
		{
			/* 0x00 */ "",
			/* 0x01 */ "0.18 micron Intel Celeron",
			/* 0x02 */ "0.18 micron Intel Pentium III",
			/* 0x03 */ "0.13 micron Intel Celeron",
			/* 0x04 */ "0.13 micron Intel Pentium III",
			/* 0x05 */ "",
			/* 0x06 */ "0.13 micron Intel Pentium III Mobile",
			/* 0x07 */ "0.13 micron Intel Celeron Mobile",
			/* 0x08 */ "0.18 micron Intel Pentium 4",
			/* 0x09 */ "0.13 micron Intel Pentium 4",
			/* 0x0A */ "0.13 micron Intel Celeron",
			/* 0x0B */ "0.13 micron Intel Pentium 4 Xeon",
			/* 0x0C */ "Intel Xeon MP",
			/* 0x0D */ "",
			/* 0x0E */ "0.18 micron Intel Pentium 4 Xeon",
			/* 0x0F */ "Mobile Intel Celeron",
			/* 0x10 */ "",
			/* 0x11 */ "Mobile Genuine Intel",
			/* 0x12 */ "Intel Celeron M",
			/* 0x13 */ "Mobile Intel Celeron",
			/* 0x14 */ "Intel Celeron",
			/* 0x15 */ "Mobile Genuine Intel",
			/* 0x16 */ "Intel Pentium M",
			/* 0x17 */ "Mobile Intel Celeron",
		};

		// Only override the brand if we have it in the lookup table.  We should
		// already have a string here from Getcpu_info().  JC
		if ( cpu_info.uiBrandID < LL_ARRAY_SIZE(INTEL_BRAND) )
		{
			strcpy(cpu_info.strBrandID, INTEL_BRAND[cpu_info.uiBrandID]);

			if (cpu_info.uiBrandID == 3 && cpu_info.uiModel == 6)
			{
				strcpy(cpu_info.strBrandID, "0.18 micron Intel Pentium III Xeon");
			}
		}
	}

	// Then we translate the cpu family
    switch (cpu_info.uiFamily)
	{
		case 3:			// Family = 3:  i386 (80386) processor family
			strcpy(cpu_info.strFamily, "Intel i386");	/* Flawfinder: ignore */	
			break;
		case 4:			// Family = 4:  i486 (80486) processor family
			strcpy(cpu_info.strFamily, "Intel i486");	/* Flawfinder: ignore */	
			break;
		case 5:			// Family = 5:  Pentium (80586) processor family
			strcpy(cpu_info.strFamily, "Intel Pentium");	/* Flawfinder: ignore */	
			break;
		case 6:			// Family = 6:  Pentium Pro (80686) processor family
			strcpy(cpu_info.strFamily, "Intel Pentium Pro/2/3, Core");	/* Flawfinder: ignore */	
			break;
		case 15:		// Family = 15:  Extended family specific
			// Masking the extended family
			cpu_info.uiExtendedFamily = (eaxreg >> 20) & 0xFF;
			switch (cpu_info.uiExtendedFamily)
			{
				case 0:			// Family = 15, Ext. Family = 0:  Pentium 4 (80786 ??) processor family
					strcpy(cpu_info.strFamily, "Intel Pentium 4");	/* Flawfinder: ignore */	
					break;
				case 1:			// Family = 15, Ext. Family = 1:  McKinley (64-bit) processor family
					strcpy(cpu_info.strFamily, "Intel McKinley (IA-64)");	/* Flawfinder: ignore */	
					break;
				default:		// Sure is sure
					strcpy(cpu_info.strFamily, "Unknown Intel Pentium 4+");	/* Flawfinder: ignore */	
					break;
			}
			break;
		default:		// Failsave
			strcpy(cpu_info.strFamily, "Unknown");	/* Flawfinder: ignore */
			break;
    }

	// Now we come to the big deal, the exact model name
	switch (cpu_info.uiFamily)
	{
		case 3:			// i386 (80386) processor family
			strcpy(cpu_info.strModel, "Unknown Intel i386");	/* Flawfinder: ignore */
			strncat(strCPUName, "Intel i386", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */		
			break;
		case 4:			// i486 (80486) processor family
			switch (cpu_info.uiModel)
			{
				case 0:			// Model = 0:  i486 DX-25/33 processor model
					strcpy(cpu_info.strModel, "Intel i486 DX-25/33");	/* Flawfinder: ignore */			
					strncat(strCPUName, "Intel i486 DX-25/33", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */		
					break;
				case 1:			// Model = 1:  i486 DX-50 processor model
					strcpy(cpu_info.strModel, "Intel i486 DX-50");	/* Flawfinder: ignore */		
					strncat(strCPUName, "Intel i486 DX-50", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */		
					break;
				case 2:			// Model = 2:  i486 SX processor model
					strcpy(cpu_info.strModel, "Intel i486 SX");	/* Flawfinder: ignore */		
					strncat(strCPUName, "Intel i486 SX", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */		
					break;
				case 3:			// Model = 3:  i486 DX2 (with i487 numeric coprocessor) processor model
					strcpy(cpu_info.strModel, "Intel i486 487/DX2");	/* Flawfinder: ignore */		
					strncat(strCPUName, "Intel i486 DX2 with i487 numeric coprocessor", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */		
					break;
				case 4:			// Model = 4:  i486 SL processor model (never heard ?!?)
					strcpy(cpu_info.strModel, "Intel i486 SL");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel i486 SL", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				case 5:			// Model = 5:  i486 SX2 processor model
					strcpy(cpu_info.strModel, "Intel i486 SX2");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel i486 SX2", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				case 7:			// Model = 7:  i486 write-back enhanced DX2 processor model
					strcpy(cpu_info.strModel, "Intel i486 write-back enhanced DX2");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel i486 write-back enhanced DX2", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				case 8:			// Model = 8:  i486 DX4 processor model
					strcpy(cpu_info.strModel, "Intel i486 DX4");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel i486 DX4", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				case 9:			// Model = 9:  i486 write-back enhanced DX4 processor model
					strcpy(cpu_info.strModel, "Intel i486 write-back enhanced DX4");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel i486 DX4", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				default:		// ...
					strcpy(cpu_info.strModel, "Unknown Intel i486");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel i486 (Unknown model)", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
			}
			break;
		case 5:			// Pentium (80586) processor family
			switch (cpu_info.uiModel)
			{
				case 0:			// Model = 0:  Pentium (P5 A-Step) processor model
					strcpy(cpu_info.strModel, "Intel Pentium (P5 A-Step)");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel Pentium (P5 A-Step core)", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;		// Famous for the DIV bug, as far as I know
				case 1:			// Model = 1:  Pentium 60/66 processor model
					strcpy(cpu_info.strModel, "Intel Pentium 60/66 (P5)");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel Pentium 60/66 (P5 core)", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				case 2:			// Model = 2:  Pentium 75-200 (P54C) processor model
					strcpy(cpu_info.strModel, "Intel Pentium 75-200 (P54C)");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel Pentium 75-200 (P54C core)", sizeof(strCPUName)-strlen(strCPUName)-1);	/* Flawfinder: ignore */	
					break;
				case 3:			// Model = 3:  Pentium overdrive for 486 systems processor model
					strcpy(cpu_info.strModel, "Intel Pentium for 486 system (P24T Overdrive)");	/* Flawfinder: ignore */	
					strncat(strCPUName, "Intel Pentium for 486 (P24T overdrive core)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 4:			// Model = 4:  Pentium MMX processor model
					strcpy(cpu_info.strModel, "Intel Pentium MMX (P55C)");	/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium MMX (P55C core)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 7:			// Model = 7:  Pentium processor model (don't know difference to Model=2)
					strcpy(cpu_info.strModel, "Intel Pentium (P54C)");		/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium (P54C core)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 8:			// Model = 8:  Pentium MMX (0.25 micron) processor model
					strcpy(cpu_info.strModel, "Intel Pentium MMX (P55C), 0.25 micron");		/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium MMX (P55C core), 0.25 micron", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				default:		// ...
					strcpy(cpu_info.strModel, "Unknown Intel Pentium");	/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium (Unknown P5-model)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
			}
			break;
		case 6:			// Pentium Pro (80686) processor family
			switch (cpu_info.uiModel)
			{
				case 0:			// Model = 0:  Pentium Pro (P6 A-Step) processor model
					strcpy(cpu_info.strModel, "Intel Pentium Pro (P6 A-Step)");		/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium Pro (P6 A-Step core)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 1:			// Model = 1:  Pentium Pro
					strcpy(cpu_info.strModel, "Intel Pentium Pro (P6)");		/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium Pro (P6 core)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 3:			// Model = 3:  Pentium II (66 MHz FSB, I think) processor model
					strcpy(cpu_info.strModel, "Intel Pentium II Model 3, 0.28 micron");		/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium II (Model 3 core, 0.28 micron process)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 5:			// Model = 5:  Pentium II/Xeon/Celeron (0.25 micron) processor model
					strcpy(cpu_info.strModel, "Intel Pentium II Model 5/Xeon/Celeron, 0.25 micron");		/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium II/Xeon/Celeron (Model 5 core, 0.25 micron process)", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 6:			// Model = 6:  Pentium II with internal L2 cache
					strcpy(cpu_info.strModel, "Intel Pentium II - internal L2 cache");	/*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium II with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 7:			// Model = 7:  Pentium III/Xeon (extern L2 cache) processor model
					strcpy(cpu_info.strModel, "Intel Pentium III/Pentium III Xeon - external L2 cache, 0.25 micron");		 /*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium III/Pentium III Xeon (0.25 micron process) with external L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 8:			// Model = 8:  Pentium III/Xeon/Celeron (256 KB on-die L2 cache) processor model
					strcpy(cpu_info.strModel, "Intel Pentium III/Celeron/Pentium III Xeon - internal L2 cache, 0.18 micron");	 /*Flawfinder: ignore*/
					// We want to know it exactly:
					switch (cpu_info.uiBrandID)
					{
						case 1:			// Model = 8, Brand id = 1:  Celeron (on-die L2 cache) processor model
							strncat(strCPUName, "Intel Celeron (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
                        case 2:			// Model = 8, Brand id = 2:  Pentium III (on-die L2 cache) processor model (my current cpu :-))
							strncat(strCPUName, "Intel Pentium III (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
						case 3:			// Model = 8, Brand id = 3:  Pentium III Xeon (on-die L2 cache) processor model
                            strncat(strCPUName, "Intel Pentium III Xeon (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
						default:		// ...
							strncat(strCPUName, "Intel Pentium III core (unknown model, 0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
					}
					break;
				case 9:		// Model = 9:  Intel Pentium M processor, Intel Celeron M processor, model 9
					strcpy(cpu_info.strModel, "Intel Pentium M Series Processor");	 /*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium M Series Processor", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;
				case 0xA:		// Model = 0xA:  Pentium III/Xeon/Celeron (1 or 2 MB on-die L2 cache) processor model
					strcpy(cpu_info.strModel, "Intel Pentium III/Celeron/Pentium III Xeon - internal L2 cache, 0.18 micron");	 /*Flawfinder: ignore*/
					// Exact detection:
					switch (cpu_info.uiBrandID)
					{
						case 1:			// Model = 0xA, Brand id = 1:  Celeron (1 or 2 MB on-die L2 cache (does it exist??)) processor model
							strncat(strCPUName, "Intel Celeron (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
                        case 2:			// Model = 0xA, Brand id = 2:  Pentium III (1 or 2 MB on-die L2 cache (never seen...)) processor model
							strncat(strCPUName, "Intel Pentium III (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
						case 3:			// Model = 0xA, Brand id = 3:  Pentium III Xeon (1 or 2 MB on-die L2 cache) processor model
                            strncat(strCPUName, "Intel Pentium III Xeon (0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
						default:		// Getting bored of this............
							strncat(strCPUName, "Intel Pentium III core (unknown model, 0.18 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
					}
					break;
				case 0xB:		// Model = 0xB: Pentium III/Xeon/Celeron (Tualatin core, on-die cache) processor model
					strcpy(cpu_info.strModel, "Intel Pentium III/Celeron/Pentium III Xeon - internal L2 cache, 0.13 micron");	 /*Flawfinder: ignore*/
					// Omniscient: ;-)
					switch (cpu_info.uiBrandID)
					{
						case 3:			// Model = 0xB, Brand id = 3:  Celeron (Tualatin core) processor model
							strncat(strCPUName, "Intel Celeron (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
                        case 4:			// Model = 0xB, Brand id = 4:  Pentium III (Tualatin core) processor model
							strncat(strCPUName, "Intel Pentium III (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
						case 7:			// Model = 0xB, Brand id = 7:  Celeron mobile (Tualatin core) processor model
                            strncat(strCPUName, "Intel Celeron mobile (Tualatin core, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
						default:		// *bored*
							strncat(strCPUName, "Intel Pentium III Tualatin core (unknown model, 0.13 micron process) with internal L2 cache", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
							break;
					}
					break;
				case 0xD:		// Model = 0xD:  Intel Pentium M processor, Intel Celeron M processor, model D
					strcpy(cpu_info.strModel, "Intel Pentium M Series Processor");	 /*Flawfinder: ignore*/
					strncat(strCPUName, "Intel Pentium M Series Processor", sizeof(strCPUName)-(strlen(strCPUName)-1)); /*Flawfinder: ignore*/
					break;